1. Field of the Invention
This invention relates to a Current-Sourced, Anti-Resonant, CSAR Technology, DC power conversion process. And more specifically, resonant power converters using a series-resonant input stage comprised in part by power provided by the input DC voltage source in addition to a voltage component extracted from the negative voltage waveform in the anti-resonant tank circuit. And subsequently reflected back into the series-resonant tank circuit, as an additive constituent to the DC source voltage. The two voltage components combine to appear as a source voltage, to the series-resonant input stage, of a magnitude greater than that of the DC source voltage acting by itself. Consequently, the voltage developed across the resonant capacitor, sourcing voltage to the anti-resonant tank, is not confined to the usual doubling of the input DC source voltage. But, rather becomes a product of the combined voltage constituents yielding a resonant capacitor voltage several orders of magnitude higher than the DC source voltage. In addition, increasing the DC source voltage above the initial regulating threshold alters the feedback voltage coefficient in an inverse manner. This characteristic yields a regulated voltage amplitude to the resonant capacitor voltage sourcing energy to the anti-resonant tank circuit. The output winding of the power transformer is also regulated by virtue of its being coupled to a common core. It is this regulating effect by the anti-resonant circuit that introduces a Pulse Position De-modulation coefficient (PPD) into an otherwise traditionally implemented Pulse Position Modulation (PPM) feedback control circuit.
2. Description of Prior Art
It is extremely difficult to differentiate this conceptual development with that deemed xe2x80x9cPrior Artxe2x80x9d since the technology described herein is a new and a radically different departure from that in general use at this time. By this token, all switching circuits known to date could be relegated into the realm of Prior Art. But to no particular service or advantage to any existing design practice. Thus, the task of describing the Prior Art becomes laborious and unproductive. Delineation lies in the fundamental load-line characteristic reflected by existing switching circuitry and that proposed herein. All switching circuits in current use reflect a negative resistance associated with an input characteristic that is used to describe a constant power input load line. Switching circuitry in current use extracts the negative resistance characteristic from the average current component. The peak current component, in all cases, follows a more traditional conceptual response: It increases with increasing voltage application. Peak current in the circuit function described herein for CSAR Technology implementation differs from traditional switching circuitry in that the negative resistance is derived directly from the peak current. That is to say, The peak current develops in an inverse manner to applied voltage. As the voltage increases: the current decreases in direct proportion. Negative resistance being derived from the peak currentxe2x80x94as opposed to its being derived from the average component, as is the usual case, stems from the PPD feedback function. In that duty cycle remains essentially constant with changing input voltage. Therefore: the only circuit function allowed is in a current reaction inverse to that of applied voltage.
It is imperative to point out at this juncture that most of the circuit reactions documented in this application for Letters Patent have been noted in previous circuit structures implemented within the general scope of CSAR technology. The initial being in Provisional application No. 60/103,134 filed on Oct. 5, 1998. The waveform of FIG. 1A, on page 2, clearly shows the power switch timing pulse intercepting the negative portion of the anti-resonant AC voltage at the average juncture.
The circuit described in U.S. Pat. No. 6,490,177 B1 for a design coefficient of K=1.41 will reflect the negative resistance derived from the peak current when the input DC voltage is varied around its nominal 28V level. This characteristic was observed but not fully understood until such time it became obvious that attempts to incorporate this feature in the application would invite an objection of xe2x80x9cintroduction of new matterxe2x80x9d by the Examiner. Another reason for not pushing the matter being that the circuit structure in this Patent is intended for applications fed by regulated PFC mains, or regulated voltages derived from a sourcing power supply. So, in this respect it was deemed to be an irrelevant issue. The aspect of interrupting the negative waveform in the anti-resonant tank is broached in column 8, lines 32 through 36 and column 9 lines 60 through 67 and column 10, lines 1 through 19. Of U.S. Pat. No. 6,490,177 B1. The issues surrounding this phenomenon of being able to discipline circuit design to yield anti-resonant tank voltages much higher than twice the input DC voltage were researched and reserved for this application via provisional application, referenced above, now abandoned.
In conclusion it must be added, that: There is a lot of misinformation being bandied about with respect to implementation of anti-resonance based circuitry. One critique focusing squarely on the problems, inherent to deployment of such topologies, is found in U.S. Pat. No. 4,415,959 by P. Vinciarelli. Under section 2, titled: xe2x80x9cDescription of the Prior Art.xe2x80x9d Mr. Vinciarelli projects a clear understanding of problems associated with deployment of such circuit topologies. His dissertation pin-points the principal problems associated with this technology in the early years of such developments. Observations tendered in this document fortunately are no longer valid, with the development of the anti-resonant topology based on CSAR Technology. Others have used these concerns, however valid, as scare tactics simply to promote inferior, peripheral circuit topologies with little or nothing to offer with respect to real progress. There are, to be sure, valid concerns regarding over-all discipline of CSAR Technology as there is with any new proposal. One consideration being in the circulation of higher than usual current in the loop formed by the resonant capacitor and the primary winding on the power transformer. While this is something to be given due consideration in circuit design: The importance of such is in fact minimal. Low output hardwarexe2x80x94of 1.0V, or less,xe2x80x94provides designers with many favorable design options to address this problem. A power converter of 1.0Vxe2x80x9430A is a 30W unit. One auspicious physical observation is that heat radiating surface increases as power is decreased. Therefore accommodation of the thermal contribution from such circulating current becomes merely a minor design consideration. And easily off-set by the consideration that no extra circuitry is required to re-set the core""s magnetic field as well in addition to the advantage, cited above, for the inherently increased heat radiating surface area. The examples above, are included to acknowledge that while design problems exist in successful deployment of CSAR based Technology, They are well within the limitations of prudent engineering practice within the design disciplines available in present day practice.
An object of this invention is to describe a design process incorporating functional properties embedded in CSAR Technology under a Pulse-Position-Demodulation feedback control loop.
Another object of this invention is to describe a power transfer function based on non-polarized, half-wave rectified, fly-back simulation under CSAR Technology PPD control.
Another object of this invention is to describe a power transfer function based on non-polarized, half-wave rectified, with wave-shaping output filter under CSAR Technology PPD control.
Another object on this invention is to describe a power transfer function based on a center-tapped, full wave rectified, L-C integrating output filter under CSAR Technology PPD control.
Another object of this invention is to illustrate capability by the power transfer function to accept any combination of half, or full-wave, rectifier/filter assemblies on the secondary windings of an isolation transformer. For delivery of power to prescribed output loads.
Another object of the invention is to illustrate a bi-polar power transmission process allowing non-polarized magnetic transformation with automatic re-set of the flux field in the magnetic core while using a single power switch referenced to the input power return bus.
Another object of the invention is to define a design discipline in which an over-all DC to DC power conversion process incorporates a regulated AC to DC power supply loop within the over-all design topology. Wherein power supply AC input current is sinusoidal and continuous throughout the power transmission cycle while in complete isolation from the power switch.
Another object of the invention is to reflect high circuit adaptability to synchronous rectification due to soft crossover of secondary AC currents circulated in the transformer and rectifier/filter assemblies.
The transfer functions described herein subscribe to standard industry definitions for functions employed. The definition for Anti-Resonance abides by the numerical definition described in xe2x80x9cPrinciples of Radio Engineeringxe2x80x9d by R. S. Glasgow, and are as defined grammatically in xe2x80x9cWebster""s Encyclopedic Unabridged Dictionary of the English Languagexe2x80x9d 1989. Power transfer terminology such as; half or full-wave relates to the type rectification circuit employed to transfer a power pulse from the input mains to the output load only, as defined by xe2x80x9cRectification circuitsxe2x80x9d by R. W. Armstrong, Proc. I.R.E. Vol. 19, January 1931. In the same context: A power converter converts power from a DC source to a DC load. A power supply transfers power from an AC source to a DC load and an Inverter converts power from a DC source to an AC output.
A practical circuit for achieving power transfer from a DC input power source to a DC load, while incorporating an AC power supply within the power transfer loop, consists of a DC voltage source, a resonating inductor and a resonating capacitor to describe an input current source. Placement of a magnetic transformer winding across the resonant capacitor will result in a parallel-resonant circuit if the transformer winding inductance is made to resonate with the capacitor. In this case, the reactance of each resonating element will cancel each other out yielding, an internal impedance equal to unity. Consequently, current flowing in the parallel tank circuit will develop a voltage of infinite proportion leading to circuit destruction. Thus, the term: Anti-resonance. In a practical circuit however, this condition is not allowed to exist due to load current reflection from the output winding to the input winding by virtue of both being located on a common magnetic core. The load component is out-of-phase with the reactive element by 90 degrees thus serves to swamp-out the reactive components which have essentially canceled each other out. Load current thus flows in the transformer input winding throughout the entire frequency cycle, by virtue of its 90 degree phase-shift, thus preventing the circuit to become anti-resonant, although it is configured as such. Anti-resonant circuitry does not require a high degree of loading for functional stability due to the high quality of available materials. Test circuits have been operated at no-load with out damage. Circuitry designed for operation at no-load would require special control configurations for prolonged operation at no-load, either a bang-bang control loop or a power to energy conversion feedback control scheme to over-ride the PPD control loop at a specific light load condition.
When the resonating capacitor is sized correctly to accept the required amount of energy to satisfy the transfer requirement. That portion of the negative waveform created across the transformer input winding, and intercepted by the timing pulse ON transition, will transfer its volt-second envelope in an additive manner to the DC input line voltage to be absorbed by the resonating inductor as a composite of the two voltages. The resonating inductor then transfers two times the voltage absorbed to the resonating capacitor. For instance; if a 20V DC input source is coupled to a 10 volt-second segment of the negative sine wave impressed across the primary winding of the power isolation transformer by the intercept action of the power switch: A voltage of 30 volts will be absorbed by the resonating inductor. The resonating inductor will then release an equal amount of voltage as a negative polarity across the resonating capacitor as that absorbed from the source. Thus two times the voltage will be deposited across the resonating capacitor for a peak voltage of: 60V! Thereby a 20V DC input line will generate a 60V peak pulse across the resonating capacitorxe2x80x94and maintain that level as a regulated voltage for increasing input line voltage above the lower regulating band threshold. This is due to positive migration of the intercept point along the negative cosine voltage slope in an inverse relationship between the two voltages. A circuit with design parameters specified herein will regulate and input line swing of 2:1. Breadboard circuitry used for reduction to practice of the theoretical concepts embodied herein regulated a DC input line voltage swing from 20 to 40V. Experimental circuits have yielded regulated DC input line voltage swings of 3:1.
A properly designed circuit will exhibit a sharp transition into the regulating band. If, for instance, the lower regulating band limit is set to 17V for a desired regulating band of 20-40V, the input line will be well into regulation by the 20V lower limit due to the sharp band transition. Experimental circuitry reveals a certain amount of headroom is required above the upper limit of the input voltage regulation band to accommodate load regulation. Load regulation involves voltage amplitude as opposed to duty cycle control being that Pulse Position De-modulation (PPD) negates, to a certain degree, variable duty cycle for load changes as well as line swings. And finally, PPD control works best with a low design co-efficient (K) due to need for a substantial negative voltage swing in the Anti-Resonant voltage waveform. There is a design need for introduction of a limited amount of duty-cycle control into the feedback loop to prevent re-flow of current from the input DC voltage source. This condition is introduced during the time that instantaneous AC sinusoidal voltage on the positive portion of the cycle becomes lower than the DC input line voltage level. A condition designated as Voltage threshold, Vth, and deemed a prohibitive operational state. It introduces a situation allowing flow of input current from the input DC voltage source into the anti-resonant circuit due to the power switch being in an ON state beyond this point in time, resulting in the power switch having to interrupt input current and diminished over-all circuit performance. The power switch tends to remain ON beyond the point of crossover voltage level between that of the input DC voltage source and Vth because the timing pulse has a built-in finite time duration. Therefore; allowing the timing pulse leading edge to migrate along the negative cosine slope of the AC power waveform, also results in the trailing edge on the timing pulse to move in a similar manner. And although, initially set to be above Vth, it very quickly migrates below Vth, to allow re-flow of input line current into the anti-resonant tank circuit.
A viable correction for this functional anomaly being the introduction of a frequency differential between that designed for the input series-resonant charging circuit and the forced-oscillating frequency, Fo, component incorporated in the carrier-frequency assigned to the anti-resonant tank circuit. This situation introduces a dead-band between the two frequency components and also brings into play a certain degree of duty cycle variation into the feedback loop which is used to compensate for migration of the trailing edge of the timing pulse. This design process serves to maintain the timing pulse trailing edge above the critical, Vth, level of the anti-resonant tank circuit voltage during its positive transition, and stabilize circuit function throughout specified input voltage and load variations.